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IP Encryption

Xilinx Vivado Design Suite® supports IEEE-1735-2014 Version 2 compliant encryption. IP encryption covers HDL (SystemVerilog, Verilog, VHDL) design entry up to the bitstream generation. IP authors can manage the access rights of their IP by expressing how tool should interact with IP

ip-encryption-flow

FAQs

  • Does encryption tool work with specific version of Vivado?
    Version 2 of encryption is supported on Vivado 2016.3 and later versions.
  • Which languages are supported by Xilinx encryption tool?
    Currently Xilinx supports VHDL, Verilog & SystemVerilog.
  • How to encrypt the file?
    Refer to user guide on how to encrypt the file.

  • Where can I find encryption examples?
    These examples are for demonstration purpose only. It may not use all the available rights and it should not be used to encrypt your IP sources.
  • Does Xilinx support Version 1 of IEEE 1735 encryption?
    Version 1 of IEEE-1735 -2014 is supported by Xilinx under limited access program. Please contact your local sales office or Applications Engineer for more information
  • Does encryption feature require license?
    Yes, encryption feature requires license, please see answer records on how to obtain a license.
  • Do my customers need license to use encrypted files?
    No, decryption is not licensed so your customers do not need special license to use encrypted files.
  • How much does encryption license cost?
    Encryption license is available at no cost to Xilinx customers.
  • How do I license my encrypted IPs?
    Xilinx currently does not support licensing of encrypted IPs.
  • Can I use Version 2 encrypted IPs with any other vendor tool?
    Consult with third-party tool vendors to determine if they support Version 2 compliance level.

  • Can I encrypt my IP for multiple vendors?
    Interoperability of encrypted sources is allowed between Version 2 compliant vendor tools. Consult with third-party tool vendors to determine if they support Version 2 compliance level.
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