Virtex-5 Embedded Tri-mode Ethernet MAC Wrapper

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Virtex-5 Embedded Tri-mode Ethernet MAC Wrapper

Name	Doc Version	Size	Date

Virtex-5 Embedded Tri-Mode Ethernet MAC Wrapper v1.6 Getting Started Guide (PDF) View Document Details The Virtex®-5 FPGA Embedded Tri-Mode Ethernet MAC Wrapper Getting Started Guide provides information about generating an embedded Tri-Mode Ethernet MAC for Virtex-5 FPGA devices, customizing and simulating the wrapper files utilizing the provided example design, and running the design files through implementation using the Xilinx® tools. Was this document helpful? Yes \| No	7.0	1.87 MB	04/24/2009
Virtex-5 Embedded Tri-Mode Ethernet MAC Wrapper v1.6 Data Sheet (PDF) View Document Details The LogiCORE™ IP Virtex®-5 FPGA Embedded Tri-Mode Ethernet MAC Wrapper automates the generation of HDL wrapper files for the Embedded Tri-Mode Ethernet MAC (Ethernet MAC) in Virtex-5 FPGAs using the Xilinx® CORE Generator™ software. Was this document helpful? Yes \| No	5.0	255 KB	04/24/2009
Virtex-5 FPGA Embedded Tri-Mode Ethernet MAC User Guide (PDF) View Document Details This user guide describes the dedicated Tri-Mode Ethernet Media Access Controller (MAC) available in Virtex®-5 devices. Was this document helpful? Yes \| No	1.9	4.98 MB	10/01/2009

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