AR #32656 - ISE Design Suite 11 ChipScope Pro Analyzer Update 2 (11.3) - README

AR#	32656
Part	SW-Chipscope Pro
Last Modified	2009-11-04 00:00:00.0
Status	Active
Keywords	SP1, SP2, SP3, SP4, Solaris, Linux, Windows, software, update, LogiCORE VIO, LogiCORE ICON, LogiCORE ATC2, Agilent Trace CORE

Solution

The destination directory specified during the setup operation must contain an existing Xilinx ISE design tools installation.
NOTE: Any new device support not previously installed should first be installed before you add the Update.

Installation Instructions for ISE Design Suite 11.3

1. Download "Xilinx_11.3_ISE_DS_<platform>.tar" from:
http://license.xilinx.com/getLicense?group=esd_oms&tab=DownloadUpdates

2. Un-tar the archive. For more information about tar files, see (Xilinx Answer 32818).

3. Open the un-tarred archive and run "xsetup.(exe)".

4. Select the root location of ISE Design Suite as your destination directory (that is, C:\Xilinx\11.1 or /opt/Xilinx/11.1).

NOTE: Web XilinxUpdate can also be used to download and install ISE design tools Updates by typing xilinxupdate into a terminal/command prompt or through ISE -> Help -> XilinxUpdate.


Installation Instructions for Standalone ChipScope 11.3

Windows Users

1. Download "Xilinx_11.3_cs_win(64).exe" from:
http://license.xilinx.com/getLicense?group=esd_oms&tab=DownloadUpdates

2. Launch Xilinx Update by double-clicking on the downloaded executable.

3. Select the location of ISE Design Suite Programming Tools as your destination directory (that is, C:\Xilinx\11.1\ChipScope).

Linux Users

1. Download "Xilinx_11.3_cs_lin(64).zip" from:
http://license.xilinx.com/getLicense?group=esd_oms&tab=DownloadUpdates

2. Unzip the archive. For more information about tar files, see (Xilinx Answer 32818).

3. Open the unzipped archive and run "xsetup" by typing ./xsetup to a terminal.

4. Select the location of ISE Design Suite Programming Tools as your destination directory (that is, /opt/Xilinx/11.1/ChipScope).


Known Issues for 11.2

(Xilinx Answer 31452) 10.1/11.x ChipScope Pro Analyzer IBERT - When I open the cable, I am asked to update my DRP settings, even though the design is unchanged
(Xilinx Answer 32432) 11.1/11.2 ChipScope Pro Analyzer - Auto Bus Creation does not work for VIO
(Xilinx Answer 32438) 11.x ChipScope Pro CORE Generator tool - The Trigger Port numbers are confusing
(Xilinx Answer 32433) 11.1/11.2 ChipScope Pro Analyzer - Auto Bus Creation creates 1-bit buses
(Xilinx Answer 31788) 11.x ChipScope Pro Analyzer - "ERROR:MapLib:990 - Map has detected that you are using ChipScope Pro analyzer cores generated prior to version 10.1..."
(Xilinx Answer 31427) 10.1/11.x ChipScope Pro Analyzer - The CPU usage is high, and my PC slows down when I perform a capture in the Analyzer on my ILA
(Xilinx Answer 32228) 10.1/11.1/11.2 ChipScope Pro Analyzer - ATC2 - Error-[URMI] Instances with unresolved modules remain in the design
(Xilinx Answer 31691) 10.1.03/11.1/11.2 ChipScope Pro Analyzer - ERROR: ChipScope Insertion failed
(Xilinx Answer 32910) 11.2 ChipScope Pro Analyzer IBERT - "ERROR - Device 1 Unit 1000"
(Xilinx Answer 32911) 11.2 ChipScope Pro Analyzer - ChipScope Pro Analyzer cannot be viewed over Microsoft NetMeeting
(Xilinx Answer 32912) 11.2 ChipScope Pro Analyzer - "ERROR:INTERNAL_ERROR:Portability:basutencodeimp.c:229:1.24" "
(Xilinx Answer 32783) 11.2 ChipScope Pro Analyzer IBERT - "ERROR:sim - Error: map failed on chipscope_ibert. ERROR:Pack:1107 - Unable to combine the following symbols into a single IOBError found during generation.
(Xilinx Answer 33041) 11.1/11.2 ChipScope Pro Analyzer - GUI hangs when I try to "Save Project"
(Xilinx Answer 33064) 10.1/11.1/11.2 ChipScope Pro Analyzer - ERROR: Socket Open Failed. localhost/0:0:0:0:0:0:0:1:50001
(Xilinx Answer 33104) 11.2 ChipScope Pro Analyzer IBERT - When I regenerate my IBERT core using the CORE Generator generated XCO, the line rate is not set
(Xilinx Answer 33241) 11.2/11.2 ChipScope Pro Analyzer - When loading a new project, some signals, buses and trigger names might be carried over
(Xilinx Answer 33242) 11.2 ChipScope Pro Analyzer, IBERT - Virtex-6 FPGA - Moving the sampling point slider sets EYE_SCAN_MODE attribute auto to manual
(Xilinx Answer 33321) 11.2 ChipScope Pro IBERT - When using the TXOUTCLK for the system clock changing the line rate of a channel effects the accuracy of BER calculations

Resolved Issues for 11.2

(Xilinx Answer 32804) 10.1.03, 11.1 ChipScope Pro Analyzer, IBERT - The Pre-Emphasis and Differential output swing do not match the User Guide
(Xilinx Answer 32431) 11.1 ChipScope Pro Analyzer IBERT - Generation fails at MAP for designs on Virtex-5 LX20T device
(Xilinx Answer 31975) 10.1 ChipScope Pro Analyzer - My ATC2 Core cannot be detected
(Xilinx Answer 32434) 11.1 ChipScope Pro Analyzer - Analyzer does not recognize Partial Bit files
(Xilinx Answer 32501) ChipScope Pro Analyzer IBERT - 8b10b is only supported with the framed counter and User Pattern
(Xilinx Answer 32299) 11.1 ChipScope Pro Analyzer - Inserter "WARNING:sim:356 - The parameter "Exclude_From_Data_Storage_1" is disabled, its value will default from false to true"
(Xilinx Answer 32346) ChipScope Pro Analyzer - What do the "Configuration Status bits" mean?


Known Issues for 11.3
(Xilinx Answer 33242) 11.2 ChipScope Pro Analyzer IBERT - Virtex-6 FPGA - Moving the sampling point slider sets EYE_SCAN_MODE attribute auto to manual
(Xilinx Answer 32438) 11.x ChipScope Pro CORE Generator - The Trigger Port numbers are confusing
(Xilinx Answer 33241) 11.1/11.2 ChipScope Pro Analyzer - When loading a new project, some signals, buses, and trigger names may be carried over
(Xilinx Answer 32912) 11.2 ChipScope Analyzer - "ERROR:INTERNAL_ERROR:Portability:basutencodeimp.c:229:1.24"
(Xilinx Answer 32228) 10.1, 11.1, 11.2 ChipScope - "Error-[URMI] Instances with unresolved modules remain in the design"
(Xilinx Answer 31691) 10.1.03, 11.1, 11.2 ChipScope Pro - "ERROR: ChipScope Insertion failed"
(Xilinx Answer 31452) 10.1, 11.x ChipScope Pro IBERT - When I open the cable, I am asked to update the DRP settings, even though the design is unchanged
(Xilinx Answer 32911) 11.2 ChipScope Pro - ChipScope Analyzer cannot be viewed over Microsoft NetMeeting
(Xilinx Answer 33064) 10.1/11.1/11.2 ChipScope Pro - Analyzer - ERROR: Socket Open Failed. localhost/0:0:0:0:0:0:0:1:50001
(Xilinx Answer 31427) 10.1, 11.x ChipScope Pro - The CPU usage is high, and my PC slows down when I perform a capture in the Analyzer on my ILA
(Xilinx Answer 33338) 11.2/11.3/11.4 ChipScope Pro Analyzer - When I reconfigure with the same bit file, my buses are displayed incorrectly
(Xilinx Answer 33524) 11.3 ChipScope Pro IBERT - CORE Generator GUI crashes when I hit generate for my Virtex-6/Spartan-6 FPGA IBERT core
(Xilinx Answer 33604) 11.3 ChipScope Pro IBERT - "ERROR:sim - Error: Par failed. Timing for this design was not met. Reduce the number of GTs enabled...."
(Xilinx Answer 33701) 11.3 ChipScope IBERT - "ERROR:HDLCompiler:1318 - "<path>/xsdb_bus_controller.vhd" Line 416: Left bound value <15> of slice is out of range [7:0] of array <sl_sel_i>"
(Xilinx Answer 33708) 11.x ChipScope Pro Inserter - "ERROR:ProjectMgmt:387-TOE: ITclInterp::ExecuteCmd gave Tcl result 'can't read "lOutputFileList": no such variable'."
(Xilinx Answer 33754)11.3 ChipScope Pro - Coregen - Number of ATD pins available on ATC2 core does not match with the User Guide
(Xilinx Answer 33755) 11.x ChipScope Pro - Inserter - Spartan-6 is shown as the device family when the project is Automotive or Low Power Spartan-6

Resolved Issues for 11.3
(Xilinx Answer 33041) 11.1/11.2 ChipScope Pro - The Analyzer GUI hangs when I try to "Save Project"
(Xilinx Answer 31788) 11.x ChipScope Pro - "ERROR:MapLib:990 - Map has detected that you are using ChipScope Pro cores generated prior to version 10.1..."
(Xilinx Answer 32433) 11.1, 11.2 ChipScope Pro Analyzer - Auto Bus Creation creates 1-bit buses
(Xilinx Answer 32432) 11.1, 11.2 ChipScope Pro Analyzer - Auto Bus Creation does not work for VIO
(Xilinx Answer 32783) 11.2 ChipScope Pro IBERT - "ERROR:sim - Error: map failed on chipscope_ibert. ERROR:Pack:1107..."
(Xilinx Answer 32910) 11.2 ChipScope Pro IBERT - "ERROR - Device 1 Unit 1000"
(Xilinx Answer 33104) 11.2 ChipScope Pro IBERT - When I regenerate my IBERT core using the CORE Generator generated XCO, the line rate is not set
(Xilinx Answer 33041) 11.1/11.2 ChipScope Pro - The Analyzer GUI hangs when I try to "Save Project"
(Xilinx Answer 33141) ChipScope/iMPACT - Operations fail when the Cable is operated at 24 MHz